Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Silicon Labs/EFR32BG22C224F512GM32/RAC_NS/RXENSRCEN#0x0
No Description
SW RX Enable
Channel Busy Enable
Timing Detected Enable
Preamble Detected Enable
Frame Detected Enable
DEMOD RX Request Enable
PRS RX Enable
https://github.com/cmsis-svd/cmsis-svd-data